1. Field of the Invention
The present invention relates to a decoding apparatus, a communication apparatus and a decoding method in which a plurality of data sequences are simultaneously received and Viterbi-decoded to judge a desired data sequence. More particularly, this invention is suitable for use with a Viterbi decoder and a data judging unit that can be applied to the reception system of an HS-SCCH (Shared Control Channel for HS-DSCH)channel which is part of W-CDNA (Wideband-Code Division Multiple Access) system, for example.
2. Description of the Related Art
In a decoding apparatus in which a plurality of data sequences are simultaneously received and any one of a plurality of data sequences encoded by data sequences assigned to each predetermined communication apparatus from a plurality of data sequences is Viterbi-decoded to thereby judge a desired data sequence, the judgment processing has been so far executed, which will be described below.
First, a plurality of data sequences are decoded at every data sequence by a single Viterbi decoder and all data sequences are processed, whereafter likelihoods of respective data sequences are compared with each other to judge validity of data sequence.
Secondly, when validity of data sequence is judged, it is customary to normalize the likelihood obtained by the Viterbi decoding in order to decrease a bit width of likelihood information. As a result, the likelihood of data obtained finally becomes different in standard at every data sequence so that the likelihood of data cannot be compared with each other without modification.
FIG. 1 of the accompanying drawings is a flowchart to which reference will be made in explaining a decoding/judging algorithm according to the related art.
Referring to FIG. 1, and following the start of operation, control goes to a step S21, whereat a processed counter value i of a plurality of data sequences is set to 1 (i=1). Control goes to the next decision step S22, whereat it is determined whether or not the processed counter value i≦4 (i=1, 2, 3, 4) is satisfied. That is, it is determined whether or not all of processing of a plurality of data sequences is ended. If the processed counter value i≦4 is satisfied as represented by a “TRUE” at the decision step S22, then control goes to a step S23, whereat a data length counter value j is set to 0 (j=0). If on the other hand the processed counter value i≦4 is not satisfied as represented by a “FALSE” at the decision step S22, then control goes to a step S28.
It is determined at the decision step S24 whether or not the data length counter value j is smaller than the data length (data length counter value j<data length). If the inequality of the data length count value j<data length is satisfied as represented by a “TRUE” at the decision step S24, then control goes to a step S25, whereat data length of every data sequence-Ni is Viterbi-decoded.
At the same time, likelihood information (State Metric value) is normalized. More specifically, in order to decrease a dynamic range, each time data is processed, all state metric values are subtracted by the minimum value of the state metric value. Then, an accumulatively added value of the state metric minimum values obtained each time data is processed, which is the resultant normalized information, is held.
At a step S26, the data length count value j is incremented (j=j+1), and control goes back to the step S24. At the step S24, the processing is repeated until the inequality of data length counter value j<data length is not satisfied. When the inequality of data length counter value j<data length is not satisfied any more, control goes to a step S27. At the step S27, the processed counter value i is incremented (i=i+1), and control goes back to the decision step S22. If the processed count value i≦4 is not satisfied as represented by a “FALSE” and the Viterbi decoding is ended, then control goes to a step S28, whereat likelihoods of the decoded results are compared with each other.
At that time, respective normalized information values are added to the state metric value of the most likelihood results of each decoded data sequence, whereafter likelihoods of respective data sequences are compared with each other. Then, it is determined by comparing the value in which the state metric value+normalized information value, which becomes the most likelihood, become the minimum value with a threshold value whether or not expected data could be received.
Also, the cited patent reference 1 discloses a serial Viterbi decoder which is suitable for use in, particular, code division multiple access (CDMA) wireless communication system, that is, a serial Viterbi decoder that can decode a convolutional-coded code string by using a chain-back memory for storing a decided bit to each of a plurality of processing cycles.
[Cited Patent Reference 1]
Official Gazette of Japanese laid-open patent application No. 2002-522944
In the above-mentioned decoding and judgment algorithm, offset values which become differences with threshold values required when they are normalized in order to compare likelihoods of a plurality of data sequences should be held and reflected on the final judgment of likelihoods. Alternatively, there was required a means for convolutional-coding data based on the decoded data sequence, calculating likelihoods with received data and judging data based upon the calculated result.
However, in the above first judgment processing, a data sequence of which likelihood is explicitly judged to be low in the data sequence decoding should be decoded to the end for comparison, and useless processing is increased unavoidably.
Also, in the above second judgment processing, an amount of data to be processed to compare likelihoods is increased and the processing becomes complicated.
Further, in the cited patent reference 1, the decoder allows the chain-back memory to hold decided bits from the preceding processing cycle as a cache so that the full chain-back operation need not always be executed but the decoding processing itself should not be stopped. As a result, the useless processing is increased similarly as described above.